Learning Objectives

• Define what assembly language is in the context of low-level programming.
• Distinguish between high-level and low-level code, and explain why assembly is necessary.

Prerequisites

• Basic programming knowledge (e.g., in C/C++).
• Understanding of what a compiler does.

Detailed Explanation

Assembly language is a symbolic representation of the instructions executed directly by a CPU. Each instruction translates to a specific binary pattern (opcode). Reading assembly bridges the gap between what high-level code says and what the CPU does.

Consider this progression from high-level to low-level:

// High-level C code
int result = a + b;

// Compiler translates to assembly (simplified)
mov eax, [a]      ; Load value of 'a' into EAX register
add eax, [b]      ; Add value of 'b' to EAX
mov [result], eax ; Store result back to memory

// Assembly translates to machine code (hexadecimal)
8B 45 FC          ; mov eax, [ebp-4]
03 45 F8          ; add eax, [ebp-8]
89 45 F4          ; mov [ebp-12], eax

Why Learn Assembly?

• Performance Analysis: Understanding what the CPU actually executes
• Debugging: Low-level debugging often requires reading disassembly
• Reverse Engineering: Analyzing software without source code
• System Programming: Writing drivers, operating systems, embedded code
• Security: Vulnerability research and exploit development

Exercises & Practice Problems

Recommended Resources

• Intel® Developer Manuals - Volume 1: Basic Architecture
• "Introduction to Assembly Language" – MIT OpenCourseWare
• "Programming from the Ground Up" by Jonathan Bartlett

Learning Objectives

• Understand the role of assemblers in converting assembly to machine code.
• Distinguish between assemblers, compilers, and disassemblers.

The Development Toolchain

The assembler is a crucial part of the software development process:

Source Code (.c, .cpp, .rs, etc.)
           ↓ [Compiler]
Assembly Code (.s, .asm)
           ↓ [Assembler]
Object Code (.o, .obj)
           ↓ [Linker]
Executable (.exe, ELF, Mach-O)

What Assemblers Do

• Translation: Convert mnemonics to opcodes
• Symbol Resolution: Handle labels and symbolic addresses
• Addressing: Calculate memory addresses and offsets
• Object File Generation: Create relocatable object files

Common Assemblers

Syntax Differences: Intel vs AT&T

Two major syntax styles exist for x86 assembly:

Exercises & Practice Problems

Learning Objectives

• Understand the x86-64 register set and their purposes.
• Grasp the basic CPU execution model and memory hierarchy.

x86-64 Register Set

x86-64 provides 16 general-purpose registers, each 64 bits wide:

Special Purpose Registers

• RIP: Instruction Pointer (program counter)
• RFLAGS: Status flags (zero, carry, sign, etc.)
• Segment Registers: CS, DS, ES, FS, GS, SS

Memory Hierarchy

Understanding the memory hierarchy helps in reading assembly code:

CPU Registers     (fastest, smallest)
    ↓
L1 Cache         (very fast, ~32KB)
    ↓  
L2 Cache         (fast, ~256KB)
    ↓
L3 Cache         (fast, ~8MB)
    ↓
Main Memory      (slower, GBs)
    ↓
Storage          (slowest, TBs)

Basic CPU Execution Cycle

1. Fetch: Get instruction from memory at RIP address
2. Decode: Interpret the instruction opcode and operands
3. Execute: Perform the operation
4. Write-back: Store results to registers/memory
5. Update RIP: Point to next instruction

; Example execution trace
mov rax, 42          ; 1. Fetch this instruction
                     ; 2. Decode: move immediate 42 to RAX
                     ; 3. Execute: load value 42
                     ; 4. Write-back: RAX = 42
                     ; 5. RIP += instruction_length

add rax, 8           ; Next instruction...

Exercises & Practice Problems

Learning Objectives

• Classify different instruction types (data movement, arithmetic, etc.).
• Apply fundamental assembly instructions in short code snippets.

Prerequisites

• Understanding of registers and CPU architecture.
• Familiarity with basic binary and hexadecimal notation.

Detailed Explanation

Assembly instructions can be categorized into several fundamental types:

Data Movement Instructions

• The mov instruction copies data from one place to another
• push and pop work with the stack
• lea (Load Effective Address) calculates addresses

Arithmetic Instructions

• Arithmetic instructions modify registers based on operation
• add, sub perform basic arithmetic
• mul, imul for multiplication (unsigned/signed)
• div, idiv for division (unsigned/signed)

Logical Instructions

• Logical instructions perform bitwise operations
• and, or, xor for boolean logic
• not for bitwise negation
• shl, shr for bit shifting

Comparison Instructions

• cmp sets flags (in rflags) for subsequent conditional jumps
• test performs bitwise AND and sets flags without storing result

; Example instruction sequence
mov rax, 10         ; rax = 10
add rax, 5          ; rax = 15  
cmp rax, 20         ; compare rax with 20, sets condition flags
sub rax, 3          ; rax = 12
and rax, 0xF        ; rax = 12 & 15 = 12 (no change in this case)

Flag Effects

Many instructions affect the CPU flags register (RFLAGS):

• ZF (Zero Flag): Set if result is zero
• SF (Sign Flag): Set if result is negative
• CF (Carry Flag): Set if unsigned overflow occurs
• OF (Overflow Flag): Set if signed overflow occurs

Exercises & Practice Problems

mov rax, 3          ; rax = 3
mov rbx, 5          ; rbx = 5  
imul rax, rbx       ; rax = 3 * 5 = 15
add rax, 2          ; rax = 15 + 2 = 17

Recommended Resources

• Intel Developer Manual, Vol. 2: Instruction Set Reference
• x86 Instruction Set Reference

Learning Objectives

• Describe how x86-64 instructions are structured (mnemonic + operands).
• Interpret opcodes, mnemonics, and operands in various disassembly outputs.

Prerequisites

• Knowledge of x86-64 instruction classification.
• Familiarity with a disassembler (e.g., objdump, gdb).

Detailed Explanation

Instruction Structure

Every x86-64 instruction follows this general format:

[PREFIX] MNEMONIC [OPERAND1], [OPERAND2], [OPERAND3]

Syntax Differences: Intel vs AT&T

Two major syntax styles exist for x86 assembly:

Examples Side by Side

; Intel Syntax (NASM, MASM, disassemblers)
mov eax, ebx          ; destination, source
add eax, 5            ; register, immediate  
mov eax, [ebx+4]      ; memory addressing
mov DWORD PTR [eax], 42

# AT&T Syntax (GAS, GCC output)
movl %ebx, %eax       # source, destination
addl $5, %eax         # immediate, register
movl 4(%ebx), %eax    # memory addressing  
movl $42, (%eax)

Operand Types

• Register Operands: CPU registers (rax, rbx, etc.)
• Immediate Operands: Constant values embedded in instruction
• Memory Operands: References to memory locations

Machine Code Representation

Assembly instructions are encoded as machine code (opcodes):

Assembly:     mov eax, 42
Machine Code: B8 2A 00 00 00
              │  └─────────── 32-bit immediate value (42)
              └─── Opcode for "mov eax, immediate"

Disassembly Output Examples

Different tools show assembly in various formats:

objdump (AT&T syntax):

$ objdump -d program
  400546: 48 89 e5    mov    %rsp,%rbp
  400549: c7 45 fc 2a movl   $0x2a,-0x4(%rbp)

gdb (can switch between syntaxes):

(gdb) set disassembly-flavor intel
(gdb) disas
   0x400546: mov    rbp,rsp
   0x400549: mov    DWORD PTR [rbp-0x4],0x2a

Exercises & Practice Problems

Recommended Resources

• GNU Assembler (AT&T syntax) documentation
• NASM (Intel syntax) documentation
• Intel Developer Manual, Vol. 2: Instruction Set Reference